Project 3, Due 12/5/2002 (before midnight)
This is a team project. Each team must consist of 2-4
people. Single person submissions will get an automatic 0.
The point of this project is to implement the IJVM2 in hardware.
The specification of the IJVM2 is ACL2 specific, but since it
tells you what needs to be done at the bit level, it is not hard
to see that it can also serve as a specification that can be used
for an Altera design. There are two issues, however.
- In the ACL2 specification, memories are alists mapping
addresses to values. In the Altera design, you can
implement RAM with Embedded Array Blocks. Look at the
documentation on RAM, Embedded Array Blocks, and ROM/RAM
Megafunctions. It may also help you to look at chapter 13
of the Hamblen and Furman book.
- In order to be able to probe the memory in the Altera
implementation, we will add some instructions to the IJVM2.
The instructions are used to show the contents of bytes on
the LED display of the Altera board. The format of the
instructions is as follows.
The instructions work as follows. They use the LED to display
the ith byte (i is based on the opcode)
of [L[C[pc]]], where the notation I am using is the same
as that used to define the IJVM2 and the high order byte is byte
1. Also, the pc is incremented by one after the opcode
is seen (so that pc in the above expression points to the byte after the
opcode), and the pc is incremented after the instruction
is processed (so that it points to the next instruction in
memory), thus, until now, this is similar to what a load
instruction does. But the ISHOW instructions are very
different in the that the next instruction is not automatically
processed. Instead, the instructions display the byte on the LED
(in hex format), and the machine pauses, with the LED still
displaying the ith byte of [L[C[pc]]], until the left
pushbutton is pressed on the board (don't forget to account for
switch contact bounce in your design). Once it is pressed, the
machine resumes executing the program.
Here is what you hand in
A README file with your names and a clear explanation of what
files are included, how to check them, what you did and did
not do, etc.
- An archive of your Altera implementation. You can create an archive by clicking on
file, then project, then archive in the
MAX+plus II tool. This will create a directory with all the
Write two non-trivial programs (e.g., use recursion and a
reasonable subset of the instruction set) to compute some
well-known functions and test your implementation. Provide a
detailed explanation on how we can test your system on the
examples you provide. Make this as "push-button" as possible,
e.g. , provide a memory that is already initialized with the test
programs, so that all we do load your program on the Altera board
and look at the LED after it finishes.
Document your design decisions and give me a 1-2 page overview of
- Return your Altera boards, cables, etc. You have until 4PM
on 12/6/2002 to do this.
It is important that you have a well-documented system that
works. Have regular group meetings and make sure that your design
is sound and that everyone is resposible for a reasonable subset
of the work. If you run into problems, e.g., say that you
design does not fit on the board, make reasonable decisions,
e.g., limit the size of memories, reduce the datapath,
Read the instructions on turning in
You do not have to implement the IMUL instruction.
You can do the extra credit only if you finish the project.
Extend the netlist language described in project 2 so that you
can deal with latches, registers, and memories.
Carry out the above project using your new language. Compare the
Create an archive of the files using tar or winzip (if you want
to use something else, ask first to make sure we can unarchive
it) and send us the archive (as a single attatchement) via email.
The email should be sent both to me and to Vernard (vernard@cc).