\documentclass[11pt]{article}
\usepackage{handout2e}
\begin{document}
\input{macros}
\input{epsf}
\input{courseMacros}
\thispagestyle{empty}
\setlength{\parindent}{0pt}
\setlength{\parskip}{1.8ex}

\head{1722}{Freshman Honors Seminar}{Winter 2003}{14 January 2003}{4}

\begin{center}
\Large{\bf Homework 2 (due Jan 28)}
\end{center}

\bigskip
{\bf 1. Multiplexers and Demultiplexers}
\begin{itemize}
\item[{\bf (a)}]
Using the gates that you have designed so far, design a 4-way 1-bit
demultiplexer.

\item[{\bf (b)}]
A {\em $k$-way $b$-bit multiplexer}\/ is one in which each of the $k$
inputs is a group of $b$ bits rather than a single bit, and the output
is a group of $b$ bits.  There are also $\log_2 k$ control bits
(assume that $k$ is a power of $2$), and these control bits are used
to select one of the $k$ groups of $b$ bits rather than a single bit.
Explain how to contruct a $k$-way $b$-bit multiplexer.  You do not
need to draw any circuits.  Start with the setting $k = 4$, $b = 2$,
and then generalize.
\end{itemize}

{\bf 2. Registers}

\begin{itemize}
\item[{\bf (a)}]
Using a combination of clocked and unclocked NOT gates, show how to
design a 4-bit register.  The register should accept a 4-bit value on
its 4 inputs before a clock pulse, and it should put that value on its
4 outputs.

\begin{figure}[ht]
\centerline{\epsfxsize=1.5in \epsffile{register.eps}}
\caption{\small A 4-bit register.}
\label{fig:register}
\end{figure}


\item[{\bf (b)}]
The register from the previous problem only holds values for one clock
cycle.  It is much more helpful if we could design the register so as
to hold the values for an extended period of time.  Extend the
register circuit from above so that it accepts an extra input $S$ (for
Set).  If $S$ is $1$, then the new circuit should behave exactly as
above when the clock pulses.  However, if $S$ is $0$ when the clock
pulses, then the register should ignore its inputs, keeping the same
outputs as before the clock pulse.
\end{itemize}

\end{document}















