College of Computer & Information Science Fall 2009 Northeastern University 23 September 2009 1800: Discrete Structures Scribe:

Design of a simple processor

1 Architecture

The processor we will design will have the following components:

• 8 32-bit registers R_{0}, R_{1}, …, R_{7} for holding data.

• 256 16-bit registers P_{0}, P_{1}, …, P_{255} for holding a program.

• A 32-bit adder.

• An 8-bit register P C that will serve as a program counter.

It is useful to have the constant values 0 and 1 available for use. So we set registers R_{0} and R_{1} to hold the values 0 and 1, respectively, permanently.

The processor will have five types of instructions: add, negate, load, and jump if zero. A program consists of a sequence of instructions stored in the 256 program registers. Each of these registers holds 16 bits. The 16 bits of an instruction specify the type of instruction and its operands. We need two bits to specify the instruction; the first two of the 16 bits (positions 0 and 1) will specify the instruction type. The formats of the 4 instructions are as follows.

The add instruction adds the contents of two registers R_{a} and R_{b} and stores the result in register R_{c}. The indices a, b, and c are specified in bit positions 2-4, 5-7, and 8-10, respectively. Bit positions 11-15 will be ignored. The add instruction also increments the program counter by 1. The add instruction

add R_{a}, R_{b} → R_{c}

is encoded as follows.

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 0 a a a b b b c c c 0 0 0 0 0

The negate instruction replaces R_{a} with −R_{a}, using the two’s complement representation. The index a is specified by bit positions 2-4. The negate instruction also increments the program counter by 1. The negate instruction

neg R_{a}

is encoded as follows.

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 1 a a a 0 0 0 0 0 0 0 0 0 0 0

The load instruction loads an 8-bit number d into the 8 low-order bit positions of register R_{a}. The index a is specified by bit positions 2-4. The value d is specified in binary by the 8 low-order positions of the instruction; that is, positions 8-15. The effect of the instruction is to set the value in register R_{a} to d; note that the 24 high-order bits of R_{a} are set to 0. Also, the program counter is incremented by 1. The load instruction

lod d → R_{a}

is encoded as follows.

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
1 0 a a a 0 0 0 d d d d d d d d

The jump if zero instruction changes the program counter register to the value specified by an 8-bit number d, if register R_{a} is 0; otherwise the program counter P C is incremented by 1, as usual. The jump if zero instruction

jiz R_{a} → d

is encoded as follows.

1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
1 0 a a a 0 0 0 d d d d d d d d

2 Multiplexers and demultiplexers

Digital circuits are designed in a modular fashion, building more and more complex components out of basic building blocks. A key component of almost every digital circuit is a device that selects any one of many inputs and sends that value to a single output, called a selector.

Consider a 2-way 1-bit multiplexer that has three inputs X_{0}, X_{1}, and Y, and a single output Z. If Y (called the control) is 0, then the output Z is the same as X_{0}; if Y is 1, then the output Z is the same as X_{1}. For example, if X_{0} is 0, X_{1} is 1, and Y is 1, then Z equals 1. The truth table for the above multiplexer is as follows.

\begin{matrix}X_{0} & X_{1} & Y & Z \\ 0 & 0 & 0 & 0 \\ 0 & 0 & 1 & 0 \\ 0 & 1 & 0 & 0 \\ 0 & 1 & 1 & 1 \\ 1 & 0 & 0 & 1 \\ 1 & 0 & 1 & 0 \\ 1 & 1 & 0 & 1 \\ 1 & 1 & 1 & 1 \end{matrix}