//******************************************************************************
//  MSP-FET430P1611 Demo - Timer_B, Toggle P1.0, CCR0 Cont. Mode ISR, DCO SMCLK
//
//  Description: Toggle P1.0 using software and TB_0 ISR. Toggles every
//  50000 SMCLK cycles. SMCLK provides clock source for TBCLK.
//  During the TB_0 ISR, P1.0 is toggled and 50000 clock cycles are added to
//  CCR0. TB_0 ISR is triggered every 50000 cycles. CPU is normally off and
//  used only during TB_ISR.
//  ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO ~800kHz
//
//           MSP430F1611
//         ---------------
//     /|\|            XIN|-
//      | |               |
//      --|RST        XOUT|-
//        |               |
//        |           P1.0|-->LED
//
//  M. Buccini
//  Texas Instruments Inc.
//  Feb 2005
//  Built with IAR Embedded Workbench Version: 3.21A
//  Modified by: G. Noubir 2/10/2006
//******************************************************************************

#include "include.h"
#include "hardware.h"
#include <stdlib.h>
#include <stdio.h>
#include "fll.h"
#include "swuart.h"

#include  <msp430x16x.h>

int main(void)
{

  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
  P5DIR |= 0x10;                            // P5.4 output
  P5OUT ^= 0x10;                            // Toggle P5.4

  TBCCTL0 = CCIE;                           // CCR0 interrupt enabled
  TBCCR0 = 16339;

  // TBCTL = TBSSEL_2 + MC_2;                  // SMCLK, contmode

  // use ACLK 32KHz, contmode
  TBCTL = TBSSEL_1 + MC_2;

  _BIS_SR(LPM0_bits + GIE);                 // Enter LPM0 w/ interrupt

}

// Timer B0 interrupt service routine

interrupt (TIMERB0_VECTOR) Timer_B(void)
{
  P5OUT ^= 0x10;                            // Toggle P5.4
  
  TBCCR0 += 16339;                          // Add Offset to CCR0
}