Well, with RISC computers having equal instruction lengths, this fact was used to full advantage through pipelining. Executing an instruction is not a single step. Instead, execution takes 5 steps:
Well, let's pull that trusty old literary device the simile to get the basic concept. Pipelining is like those little tunnels they always have at playground. Now say a bunch of children want to see how fast they can all go through the tunnels. If there is only one, each child has to wait for the child before to be partially through. However, if there were five tunnels, the children could split up and each go through different tunnels to finish much more quickly. Such is the idea of computer pipelining. Why run one instruction when you can run many through different pipelines? With RISC instructions being equal length, this is possible, whereas multi-length CISC instructions pipeline very poorly (part of the reason that RISC is the preferred type of computer).
Wow, sounds great. Wait a minute, doesn't the order in which instructions are executed matter? By doing all this splitting for pipelining, won't instructions get out of operated and separated from other instructions they should be with? Yep, that's the problem of pipelining. The computer has to figure out how to split instructions up to be pipelined without B coming before A, and so forth. While such considerations do make pipelining more difficult, it is still worth the effort for the speed it generates.