Events - Colloquia & Seminars

CCIS Colloquium Fall 2005

Design and Simulation of Multi-core System-on-Chips

Speaker: Xinping Zhu (ECE Northeastern University)

Date: Wednesday, November 2nd, 2005

Talk: 12:00 pm, 366 WVH

Abstract

Recent years have seen a proliferation of complex System-on-Chips (SoCs) that are composed of multiple processor cores. These multi-core based systems promise to deliver more computation power to the end users.

In this talk, I will introduce a retargetable simulation framework where SoC designs, including the on-chip networks, can be constructed easily and evaluated efficiently and faithfully. The modeling and simulation platform is based on an existing formal concurrency model, the Operation State Machine (OSM). Coupled with existing Processor Element (PE) models, this framework is capable of synthesizing a multiprocessor cycle-accurate SoC simulator from a system-level description. Experimental results show that this framework can significantly reduce the design turn around time and improve design reuse in the early stages of SoC design.

Looking forward, we are exploring various hardware and software design issues to make the multi-core based SoCs more reliable and efficient. We see the multi-core SoC as an ideal platform where innovative system research can be experimented on.

Biography

Xinping Zhu is an assistant professor in the Department of Electrical and Computer Engineering of Northeastern University. He received his Ph.D. in Electrical Engineering from Princeton University in 2005. He obtained his B.S.E. degree in Automation from Tsinghua University, Beijing, in 1999. His research focuses on developing modeling and simulation tools for advanced multiprocessing general purpose and embedded processors.